Presentations of Interest at DesignCon 2010

As I'm sure you already know, and as the official burb puts it "DesignCon is the definitive event for electronic design experts spanning chip, package, board, and system domains, addressing common issues in signal integrity, power management, interconnection, and design verification."

CST has been exhibiting at this event for several years now, demonstrating 3D simulation of the above components so that engineers can benefit from fully virtual design and optimization. For this year's show, we'll be showcasing our latest 2010 release and how it can benefit the DesignCon community. If you are attending, come by booth #307 on the show floor for a demo or take a look at our collaborative papers in the main conference.

Here's a selection of papers we are presenting:

• “Chip-to-Chip Communication Beyond 25 Gbps: Modeling and Realization” Jianmin Zhang, Qinghua Bill Chen, Kelvin Qiu, Cisco. Martin Schauer, Antonio Ciccomancini Scogna, and Gerardo Romo, CST of America Inc. Tuesday, February 2, 2:50 pm – 3:30 pm.


• “Efficient Modeling and Simulation for Package-PCB Co-Design and Co-Optimization” Martin Schauer, CST of America. Hong Ahn, Namhoon Kim, Chris Wyland, Paul Wu, Xilinx. Wednesday, February 3, 2:00 pm – 2:40 pm.


• “Full-Wave Time Domain Modeling of Interconnects” Martin Schauer, CST of America Inc. Alfred Neves, Tom Dagostino, Scott McMorrow, Teraspeed Consulting LLC. Thursday February 4, 9:50 am - 10:30 am.

DesignCon, Santa Clara Convention Center, Santa Clara, CA United States

First Day at DAC 2009 is over, roll on day 2

The first day of our first appearance at DAC is over. It was a busy day at the booth (#3155), and I've got to admit that I was pleasantly surprised by the response from the show floor. We decided to exhibit this year because our involvement in the EDA market is increasing continuously and DAC is still the top exhibition for this market.
One thing I've definitely noticed so far is that we are by far not so well known in the EDA world as we thought.
It seems to have been a good decision to participate and I am particularly looking forward to the wine tasting Tuesday evening! See you there?

Martin

CST's at DAC 2009

For the first time CST will be actively participating in the annual DAC show with a large booth presence and a conference presentation.

We'll also be making it a fun event with a booth wine tasting running Tuesday afternoon and beer being served on Monday and Wednesday afternoon.

Despite the economic downturn, I feel that 3D electromagnetics is becoming an essential part of many EDA workflows. We want to showcase our very strong capabilites in this area which include seamless import of layout, fast simulation for SI and PI design and very strong optimization and post processing to achieve design goals.

My colleague, Dr. Antionio Ciccomancini will present: "A Hierarchical Approach for Full-system Signal Integrity and EMC Analysis"

This is a bit of a step into the unknown for us, but we are all excited by the buzz around the show and getting our products even more widely known in the community

Jonathan

What's this all about

Welcome to CST's new technology blog. I'm going to be posting on all things EM simulation related.

Working for a leading 3D EM simulation vendor (http://www.cst.com/) gives me a great opportunity to pass-on our latest product information, but I am going to try to offer more in the form of articles from leaders in the industry, both theoretical and application oriented, as well as thoughts on the general state of play in the world we work in.

That's it for now.