The first day of our first appearance at DAC is over. It was a busy day at the booth (#3155), and I've got to admit that I was pleasantly surprised by the response from the show floor. We decided to exhibit this year because our involvement in the EDA market is increasing continuously and DAC is still the top exhibition for this market.
One thing I've definitely noticed so far is that we are by far not so well known in the EDA world as we thought.
It seems to have been a good decision to participate and I am particularly looking forward to the wine tasting Tuesday evening! See you there?
Martin
Showing posts with label DAC. Show all posts
Showing posts with label DAC. Show all posts
Tuesday, 28 July 2009
Friday, 17 July 2009
CST's at DAC 2009
For the first time CST will be actively participating in the annual DAC show with a large booth presence and a conference presentation.
We'll also be making it a fun event with a booth wine tasting running Tuesday afternoon and beer being served on Monday and Wednesday afternoon.
Despite the economic downturn, I feel that 3D electromagnetics is becoming an essential part of many EDA workflows. We want to showcase our very strong capabilites in this area which include seamless import of layout, fast simulation for SI and PI design and very strong optimization and post processing to achieve design goals.
My colleague, Dr. Antionio Ciccomancini will present: "A Hierarchical Approach for Full-system Signal Integrity and EMC Analysis"
This is a bit of a step into the unknown for us, but we are all excited by the buzz around the show and getting our products even more widely known in the community
Jonathan
We'll also be making it a fun event with a booth wine tasting running Tuesday afternoon and beer being served on Monday and Wednesday afternoon.
Despite the economic downturn, I feel that 3D electromagnetics is becoming an essential part of many EDA workflows. We want to showcase our very strong capabilites in this area which include seamless import of layout, fast simulation for SI and PI design and very strong optimization and post processing to achieve design goals.
My colleague, Dr. Antionio Ciccomancini will present: "A Hierarchical Approach for Full-system Signal Integrity and EMC Analysis"
This is a bit of a step into the unknown for us, but we are all excited by the buzz around the show and getting our products even more widely known in the community
Jonathan
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